ME7780A - Anritsu Bit Error Rate Testers

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Technical Specifications

Max. Data Rate

Max. Clock Rate

Pattern Depth
32 Mbits pattern memory

Extra Specifications
BERT system

Product Description

The Anritsu new ME7780A 48G BERT System is the recognized and established industry leader for its best performance and widest frequency coverage up to 48 Gigabits per second. Its unique design produces high quality waveforms vital for the analysis of high-speed electrical or optical components, modules, and systems for next generation networks.

The ME7780A features very low jitter, low-phase-noise, and high sensitivity input up to 48 Gbps so engineers can perform a wide array of complex measurements with high accuracy. It enables designers to characterize system designs, shorten design cycles, and improve their time to market. This BERT system consists of the MP1775A (4-Channel Pulse Pattern Generator) and MP1776A (4-Channel Error Detector) along with the new MP1811A (MUX), MP1812A (DEMUX), and an external signal source.

The signal output side consists of a 50G or 65G signal generator (MG3690B Series Synthesizer) for generating the clock signal, a pulse pattern generator (MP1775A) for generating four channels of SDH/SONET patterns, and a 4:1 multiplexer (MP1811A) for multiplexing these signals into a 48 Gbps signal.

The receiver side consists of a 1:4 demultiplexer (MP1812A) for splitting the 48 Gbps signal into four channels, and an error detector (MP1776A) for measuring the error rate of the four channels. The phase of each channel is shifted ? cycle, enabling the multiplexed signal to form a pure PRBS stream. Also, the new MP1812A Demultiplexer unit offers high resolution on the clock phase and voltage threshold, which is very important in performing Q-measurements and Bathtub Curve measurements.

Utilizing the expanded internal memory capacity of the MP1775A s 4-channels and its optional MX177601A SONET/SDH pattern editing software, the powerful ME7780A allows testing of all currently used and future concatenated signal structures up to OC-768c/STM-256c. Beyond testing SONET/SDH frames, CID patterns can be generated for stress testing the Clock Recovery Circuits used in network equipment. Anritsu 40G E/O and O/E converters provide the best combination with the ME7780A BERT system for accurately testing optical systems at 40+ Gbps data rates.

Excellent data output waveforms, low jitter, and fast rise/fall times make the ME7780A an ideal BER test solution for verifying and characterizing electrical/optical systems, modules, and devices supporting FEC, non-FEC, and Super FEC rates from 25 Gbps to 48 Gbps. User flexibility is built into the ME7780A system to effectively optimize the use of all of its components. All instruments making up this BERT system can also be used standalone or in different combinations based on test requirements, increasing the value of the capital investment.