This Precision Waveform Analyzer is a plug-in module used with the 86100C Infiniium DCA-J Digital Communications Analyzer
that provides an ideal solution to this accuracy problem. Engineers are often frustrated by test equipment limitations preventing them from seeing the true performance of their designs. This can be the case with oscilloscopes used to analyze signals from high-speed electrical communications systems. As data rates increase, these problems can get even worse.The 86108A has a bandwidth in excess of 33 GHz, channel noise of less than 300 uV, and residual jitter at an astounding level of under 100 femtoseconds (60 fs typical)! This provides a "gold standard" for waveform accuracy and translates into confidence that the waveform displayed by the oscilloscope is a faithful representation of the true device performance for today?s technology as well as future generations.
High bandwidth, low noise, ultra-low residual jitter
? Simple one connection ?triggerless? operation
? PLL characterization including loop BW/jitter transfer
? Integrated HW clock recovery with adjustable loop
BW/Peaking-exceeds industry standards for SSC tracking
? Easy setup for serial bus differential signaling (PCI-Express, SATA etc.)
Confi gured for accuracy, compliance, and ease-of-use Measurement precision is achieved by integrating channels, clock recovery, and a precision timebase into a single plug-in module. While this is a key enabler for the high performance of the instrument, it also provides signifi cant ease-of-use advantages. For analysis of embedded and distributed clock systems, simply connect either a single-ended or differential signal to the channel inputs. The internal instrumentation grade hardware clock recovery system will lock to clocks or data (including stress patterns such as CJTPAT). The system has adjustable loop BW/peaking and will synchronize the oscilloscope to any rate from 50 Mb/s to 13.5 Gb/s. Integration of the system hardware virtually eliminates the trigger-to-sample delay inherent in sampling oscilloscopes. Coupled with the high gain clock recovery, the measurement system exceeds the spread-spectrum clock (SSC) tracking requirements for compliance testing for systems such as SATA3 and SAS3. System jitter budgets can be analyzed without being obscured by large SSC components. PLL bandwidth and jitter transfer The on-board phase detector of the 86108A allows for a precision measurement of phase-locked loop (PLL) bandwidth, sometimes referred to as jitter transfer. An external software application running on a PC controls the jitter source1 to provide a modulated stimulus to the device under test (DUT). The application will monitor the internal phase detector of the 86108A to measure the stimulus as well as the DUT response. By sweeping the frequency of the jitter stimulus, the ratio of the output jitter to the input jitter provides the PLL bandwidth. The measurement system is extremely fl exible and can test input/ outputs from 50 Mb/s to 13.5 Gb/s (data signals) and/or 25 MHz to 6.75 GHz (clock signals). Thus several classes of DUTs can be measured including clock extraction circuits, multiplier/dividers, and PLLs. For example, a PLL bandwidth test for PCI-express (shown above) requires a 100 MHz clock input and a 2.5 or 5 Gb/s data output. In addition to the loop BW measurements, the jitter spectrum/phase noise of the signals can be observed providing valuable insight into the root causes of jitter.